1. Technical Field
The present invention relates generally to video controllers for data processing systems and, more specifically, to graphics coprocessors or video accelerators in a data processing system using a VRAM block write operation. Still more particularly, the present invention relates to a VRAM used in support in a video display control system for providing opaque pattern block write color expansion.
2. Description of the Related Ad:
The performance of graphics subsystems is currently limited by the ability to get the pixel information from the graphics coprocessor or accelerator to the VRAM buffer. Current memory technology using DRAM interfaces is limited to writing and reading data at about 40 nsec per transfer. The typical data width used by today's PC graphics subsystems is a 32 bit data bus. With DRAM interfaces running at 40 nsec/transfer for eight (8) bits per pixel, this corresponds to 100M Pixels per second (MP/SEC).
Currently, VRAM are capable of doing "Block Writes" which is the ability to copy the value in a color register to eight (8) pixel column locations on a single write. This capability allows for up to 32 pixels to be written in one cycle for a 32-bit data path, instead of the usual four (4) pixels. The pixel rate is then equal to 800 MP/Sec, instead of 100 MP/Sec.
In addition to writing the color register value to the eight (8) pixels, VRAM also uses an 8-bit mask register to determine whether or not it should write a particular pixel. The combination of the mask register and the color register allows the graphics engine to write transparent patterns. A transparent pattern is the result of updating the pixels that correspond to a "1" in the mask register and leaving the pixels that correspond to a "0" in the mask register to stay unchanged.
As long as transparent patterns are required, the pixel throughput is still 800 MP/Sec. Typically, however, text and pattern data is not transparent, but instead are opaque. Writing opaque patterns or fonts in this manner requires two (2) passes, so performance degrades to 400 MP/Sec and coprocessor complexity increases. Unfortunately, VRAM devices currently available lack a opaque pattern block write function. Accordingly, what is needed is a video processing system having a VRAM that supports the block write function for opaque pattern color expansion.